The pitch for running a large AI model on your own desk usually collapses at the memory question. AMD is now selling an answer to it, in the shape of a compact developer machine called Ryzen AI Halo that the company said will open for pre-orders in June 2026 exclusively through Micro Center, with a new family of processors following it.
Start with the part that does the work. Unified memory means the processor cores, the graphics and the neural engine all draw from one shared pool instead of each guarding a private stash, which is roughly the difference between a shared kitchen and three cooks with padlocked cupboards. The Halo machine is built on the Ryzen AI Max+ 395 with up to 128GB of that pool, which AMD said is enough headroom to run models of up to 200 billion parameters locally, on frameworks developers already use such as PyTorch, Ollama and LM Studio.
Jack Huynh, senior vice president and general manager of AMD's Computing and Graphics Group, put the ambition plainly. "AI is no longer confined to the cloud. It is now something developers can build, train, and run locally," he said.
The follow-on silicon is where the numbers get louder. AMD said Ryzen AI Max PRO 400 Series processors will be available in the third quarter of 2026 from OEM partners including HP and Lenovo, built on Zen 5 cores with RDNA 3.5 graphics and an XDNA 2 neural processing unit. The top part, the Ryzen AI Max+ PRO 495, carries 16 cores, boosts to 5.2 GHz, and addresses up to 192GB of unified memory, 160GB of which can be handed to graphics.
Then comes the claim that will travel furthest. AMD calls these the "world’s first x86 client processors capable of running 300 billion parameter models locally", and that is true in the particular way vendor claims tend to be true. The company's own footnote supplies the missing clause, describing the 160GB of dedicated graphics memory as "capable of running 300 billion+ parameters at 4-bit quantization".
Quantization, pronounced exactly as it looks and no fun at all to say quickly, is the trick of storing each model weight in fewer bits. Four instead of sixteen shrinks a model to a quarter of its size and gives up some precision on the way. Everybody does it, including every cloud provider, so this is not a gotcha. It is simply not the same statement as running a 300 billion parameter model at full precision, and the footnote is where that difference lives.
Similar care applies to the neural engine's rating. AMD lists the top chip at up to 55 TOPS, meaning trillions of operations per second, then notes in its own fine print that the number is a maximum in an optimal scenario and may not be typical. That is an honest disclosure, and it is also a reminder that a peak figure is a ceiling rather than a promise.
What none of this settles is whether the work actually moves. Running inference locally removes a metered bill and a network hop, and in exchange it adds a purchase order, a driver stack and a box that somebody has to sit next to and maintain. The thing holding agentic AI back has rarely been whether the weights fit in memory.
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