Memory has quietly become the component that decides how fast the rest of an AI system is allowed to run, and Samsung Electronics has just moved its own roadmap another rung up. The company says it has begun shipping the first 12-layer HBM4E samples to major global customers, only a few months after its HBM4 entered mass production.
HBM stands for high bandwidth memory, and it is pronounced letter by letter, not as a word. Think of it as an apartment block for data. Rather than spreading memory across a sprawling suburb of circuit board, engineers stack the dies vertically right next to the processor, so the commute between storage and compute is measured in millimetres instead of centimetres. Each generation either adds floors or widens the lifts.
This one mostly widens the lifts. Samsung rates the HBM4E at a stable pin speed of 14 gigabits per second, with performance scalable up to 16Gbps, which it puts at more than a 20% increase over its HBM4. Multiply that across the full width of the interface and the company arrives at memory bandwidth of up to 3.6 terabytes per second per stack.
Capacity moved as well. The 12-layer part carries 48 gigabytes, described by the company as more than a 30% increase over the previous generation, and Samsung has said it plans to widen the lineup to 32GB eight-layer and 64GB sixteen-layer parts in accordance with customer requirements.
Two less glamorous numbers matter more to anyone running a data hall. Advanced low-power design and reworked packaging improved energy efficiency by 16% and thermal resistance characteristics by more than 14% against the previous generation, according to the company. Heat is the tax every dense memory stack pays, and a stack that sheds it faster can hold its clocks for longer.
"Following the successful mass production of HBM4, Samsung has once again demonstrated its distinct technological edge with HBM4E," said Sang Joon Hwang, Executive Vice President and Head of Memory Development at Samsung Electronics. He added: "Through our advanced manufacturing capabilities and preemptive infrastructure investments, we will continue to drive the growth of the global AI memory market."
Underneath the marketing, the interesting decision is that Samsung did not rebuild the recipe. The HBM4E reuses the same sixth-generation 10-nanometre-class DRAM process, known internally as 1c, and the same 4nm logic base die from Samsung Foundry that the HBM4 uses. Keeping the process constant is the unglamorous way to protect yield when you are adding speed, and it is the sort of choice that tends to show up later as availability rather than as a specification.
Samples are not shipments, and the company has been careful about that distinction. Mass production is planned to line up with customer schedules once sampling and optimisation are done, which means the ramp depends on qualification at the handful of accelerator makers that buy memory in this class. Should those customers qualify the part quickly, the gap Samsung opened with HBM4 in February would widen; if they do not, the specification stays on paper.
For context on how quickly this ladder is being climbed, the HBM4 that preceded it was the first in the industry to reach mass production and posted 11.7Gbps in system in package testing. Samsung is now quoting a part that starts where that one topped out.
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