A chip company moved a launch date, and for once it moved the right way. Huawei used the opening keynote of its Huawei Connect conference in Shanghai to say its Ascend 960DT accelerator will be available in the first quarter of 2027, three quarters ahead of the roadmap it published a year ago. A sibling chip, the Ascend 960PR, is now due in the third quarter of 2027, one quarter early.
Some history helps. Last September, rotating chairman Eric Xu put the entire Ascend 960 series in the fourth quarter of 2027 and promised it would double the computing power, memory bandwidth, memory capacity and interconnect ports of the Ascend 950 chips before it.
The suffixes tell you what each chip is for. Picture a language model answering a question in two stages: prefill, where it reads the whole prompt at once, and decode, where it writes the reply one word at a time. The PR chip is tuned for prefill and recommendation systems. The DT chip handles decode and training, which is where the money and the heat are.
Development, the company says, has run ahead of its own expectations. "We're evolving our Ascend chip series on a one-generation-a-year cycle," David Wang, Huawei's deputy chairman and rotating chairman, said in his keynote. "In 2028 and 2029, we will roll out the Ascend 970 and 980 chips, respectively."
One wrinkle. "The Ascend 960DT is expected to be ready in Q1 2027. Ascend 960 chips are launching ahead of schedule, doubling performance and advancing year by year," a Huawei spokesperson told TechCrunch, which reports that the same spokesperson put the earlier plan at the third quarter of 2027. Huawei's own keynote text from last September says the fourth quarter, and I am going with the written roadmap.
The bigger reveal was the box the chips go in. Huawei calls it a SuperPoD, said the way it looks, and defines it as many computing nodes coupled through interconnect tightly enough to share one memory space and behave like a single computer. Imagine an office where every drawer is reachable from every desk without anyone standing up. The new Atlas 960E SuperPoD scales to 4,096 NPUs, Huawei's term for its neural processing units, and the company rates it at 8 exaflops at 8-bit precision with up to a petabyte of high-bandwidth memory. Those are Huawei's numbers, measured by nobody else yet.
What makes the 960E new is the plumbing. It uses near-packaged optics, or NPO, meaning the optical transceivers that carry data between chips sit beside the chip package rather than in pluggable modules at the front of the rack. Huawei says 5,500 of its Hi-ONE engines, each moving 7.2 terabits per second, replace the 48,000 800-gigabit optical modules a pod this size would otherwise need, cutting power draw by more than 550 kilowatts. It has also submitted an NPO implementation agreement to the Optical Internetworking Forum, a standards body, because it wants this to be everybody's plumbing.
Here is the part I keep turning over. Last year's roadmap described an Atlas 960 SuperPoD of up to 15,488 Ascend 960 chips. The pod unveiled this year tops out at 4,096, and the release does not say what became of the larger design.
The bet underneath is on scale and interconnect, the two things US export controls make hardest for a Chinese company to buy from Nvidia. A chip three quarters early is a good story. A pod one quarter the size of the one promised is the better one, and it is the one worth watching.
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